In some radio frequency (RF) communication systems, the channel spacing for the transmitter can be, for example, 5 MHz with a 200 KHz raster. This means that the channel spacing is as follows:Δfchannel=5±n×0.2 MHz,
Where n is a small integer number. Thus, the channel spacing can be, for example, 4.6 MHz, 4.8 MHz, 5.0 MHz, 5.2 MHz, etc. Examples of RF systems that use such channel spacing include WCDMA systems and UMTS systems.
FIG. 1 diagrammatically illustrates a conventional example of an architecture for producing an output transmit frequency frx having a desired channel spacing dependent upon the desired raster, for example, the channel spacing defined in the foregoing equation. In the example of FIG. 1, a baseband signal 11 is input to an intermediate frequency (IF) processing section 12 where it is combined with a signal 13 produced by a frequency synthesizer 14. The signal 13 has a frequency fLo (IF) that, when combined with the baseband signal 11 produces an IF signal 15. In the conventional example of FIG. 1, the frequency of the signal 13 is a fixed frequency. The IF signal 15 is input to an RF processing section 16, where it is combined with a signal 17 produced by a frequency synthesizer 18. The RF processing section 16 produces at 19 an output frequency frx having the desired channel spacing. The signal 17 output from the frequency synthesizer 18 has a frequency designated in FIG. 1 as fLo (RF). The frequency synthesizer 18 has raster capability which provides the desired channel spacing in the output frequency frx.
FIG. 2 diagrammatically illustrates one example of the conventional frequency synthesizer 18 of FIG. 1, namely an integer phase locked loop (PLL) example. In the example of FIG. 2, a comparison frequency generator includes an oscillator 21 and a divider 23. The oscillator 21 provides a frequency reference 22 which is applied to a divider 23 that divides the frequency reference by a divisor R to produce at 24 a comparison frequency of 200 KHz. This 200 KHz comparison frequency corresponds to a desired 200 KHz raster. A divider 25 divides the output signal 17 by a divisor N in order to obtain at 26 another 200 KHz signal. The remaining components of FIG. 2, namely the frequency generator 27, the phase detector 28, the charge pump 29 and the loop filter 30 are well known in the PLL art, both structurally and functionally, and will therefore not be described in further detail.
In the example of FIG. 2, in order to achieve the desired 200 KHz raster, the comparison frequency at 24 must be set to 200 KHz, which also requires the divider 25 to produce a 200 KHz signal at 26. This requirement of producing a 200 KHz signal can cause the divisor N of the divider 25 to be a large number. For example, and referring also to FIG. 1, if the IF signal at 15 has a frequency of 400 MHz and the frequency for ranges from 1,920 to 1,980 MHz, then the frequency fLo (RF) can be as high as 2,320 to 2,380 MHz when utilizing high-mode injection. Under these circumstances, the feedback divisor N would need to be nearly 12,000 in order to generate the 200 KHz frequency at 26. Such a large divisor N can disadvantageously result in high phase noise and therefore a large RMS phase error, and can also result in a disadvantageously slow lock time for the channel selection.
FIG. 3 diagrammatically illustrates another conventional PLL example of the frequency synthesizer 18 of FIG. 1. The synthesizer of FIG. 3 is a so-called fractional synthesizer, which is well known in the art. For larger values of M, such as M=8, the fractional frequency synthesizer can produce frequencies in the aforementioned range of 2,320 –2,380 MHz with a divisor N having a value of less than 1,500. Thus, the fractional synthesizer has the advantages of a relatively low feedback divisor N′ and thus good phase performance, and a relatively fast lock time, particularly if the oscillator is pre-tuned. However, fractional synthesizers such as shown in FIG. 3 have the inherent disadvantage of fractional spurs, as well as the disadvantage of requiring a large capacitor in the loop filter, particularly for smaller values of the divisor N. The large capacitor is particularly disadvantageous if the frequency synthesizer is intended to be fully integrated.
It is therefore desirable in view of the foregoing to provide for synthesizing frequency channel spacing without the aforementioned disadvantages associated with conventional approaches.
In the synthesis of frequency channel spacing according to the present invention, the desired raster is advantageously provided by an integer IF frequency synthesizer. The frequencies associated with the IF synthesizer are lower than those associated with an RF synthesizer, so a lower feedback divisor can be used to provide the comparison frequency associated with the desired raster. Because the raster is provided for in the IF synthesizer, the RF synthesizer can advantageously utilize a higher comparison frequency (and a correspondingly lower feedback divisor) than in prior art systems.